Invited Paper

Analyzing Timing in Shorter Time: A Journey Through Heterogeneous Parallelism for Static Timing Analysis
This paper reviews recent work on the acceleration of static timing analysis (STA), with a special focus on parallel and heterogeneous …
Zizheng Guo, Yibo Lin, Runsheng Wang, Ru Huang
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Accelerating Routability and Timing Optimization with Open-Source AI4EDA Dataset CircuitNet and Heterogeneous Platforms
Routability and timing are two critical metrics for modern VLSI circuits. With increasing design complexity and continuous shrinking of …
Xun Jiang, Zizheng Guo, Zhuomin Chai, Yuxiang Zhao, Yibo Lin, Runsheng Wang, Ru Huang
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