Differentiable-Timing-Driven Global Placement

Abstract

Placement is critical to the timing closure of the very-large-scale integrated (VLSI) circuit design flow. This paper proposes a differentiable-timing-driven global placement framework inspired by deep neural networks. By establishing the analogy between static timing analysis and neural network propagation, we propose a differentiable timing objective for placement to explicitly optimize timing metrics such as total negative slack (TNS) and worst negative slack (WNS). The framework can achieve at most 32.7% and 59.1% improvements on WNS and TNS respectively compared with the state-of-the-art timing-driven placer, and achieve 1.80× speed-up when both running on GPU.

Publication
59th ACM/IEEE Design Automation Conference (DAC) 2022
Zizheng Guo
Zizheng Guo
Undergraduate Student

I am a final-year undergraduate student in the Department of Computer Science at Peking University. My research interests include data structures, algorithm design and GPU acceleration for combinatorial optimization problems.