OpenPARF 3.0: Robust Multi-Electrostatics Based FPGA Macro Placement Considering Cascaded Macros Groups and Fence Regions

Abstract

FPGA macro placement strongly affects routability and timing closure, but practical constraints such as cascaded macro groups and fence regions make the solution space highly discontinuous and prone to divergence. This work presents OpenPARF 3.0, a robust multi-electrostatics-based FPGA macro placer that introduces a multi-electrostatics region model, divergence-aware density weight scheduling, and cascaded macro handling techniques. Experimental results show improved robustness and better quality-efficiency trade-offs than prior placers, with support for GPU acceleration.